Peregrine Semiconductor
A leading fabless provider of high-performance, radio frequency integrated circuits, or RFICs.
Peregrine Semiconductor solves the world's most difficult RF challenges.
Peregrine Semiconductor is a leading fabless provider of high-performance, radio frequency integrated circuits, or RFICs. The company’s solutions leverage UltraCMOS® technology, a patented, advanced form of silicon on insulator (SOI) that enables the design, manufacture and integration of multiple RF, analog and digital functions onto a single chip. Advancing the performance of RF SOI since 1988, Peregrine today delivers the monolithic integration and superior performance necessary to solve the RF market’s biggest challenges. Peregrine holds more than 180 filed and pending patents and has shipped more than 2 billion UltraCMOS units.
UltraCMOS technology combines the ability to achieve the high levels of performance of traditional specialty processes, with the fundamental benefits of standard CMOS, the most widely used semiconductor process technology. Utilizing UltraCMOS 10 technology, Peregrine delivered the first power amplifier (PA) to meet the performance of gallium arsenide (GaAs) as a component of their Global 1 fully integrated and reconfigurable RF front-end for the mobile device market. Recent product introductions have included state-of-the-art advancements in power limiter devices, a true DC switch delivering performance down to 0 Hz and a high linearity switch that enables a dual upstream and downstream band architecture in cable premises equipment (CPE) devices—allowing CPEs to meet the stringent new requirements of the DOCSIS 3.1 cable industry standard.
Peregrine’s superior linearity, power handling and harmonic performance delivers products that meet the exacting requirements in a broad range of applications in aerospace and defense, broadband, industrial, mobile wireless device, test-and-measurement (T&M) equipment and wireless-infrastructure markets. Peregrine’s products are sold worldwide through direct sales and field applications engineering staff and a network of independent sales representatives and distribution partners.
Peregrine Semiconductor Postings
2 technical articles »
NSOP Reduction for QFN RFIC Packages
Aug 31, 2017 | Mumtaz Y. Bora
Wire bonded packages using conventional copper leadframe have been used in industry for quite some time. The growth of portable and wireless products is driving the miniaturization of packages resulting in the development of many types of thin form factor packages and cost effective assembly processes. Proper optimization of wire bond parameters and machine settings are essential for good yields.
Wire bond process can generate a variety of defects such as lifted bond, cracked metallization, poor intermetallic etc. NSOP – non-stick on pad is a defect in wire bonding which can affect front end assembly yields. In this condition, the imprint of the bond is left on the bond pad without the wire being attached. NSOP failures are costly as the entire device is rejected if there is one such failure on any bond pad. The paper presents some of the failure modes observed and the efforts to address NSOP reduction...
Failure Modes in Wire bonded and Flip Chip Packages
Dec 11, 2014 | Mumtaz Y. Bora
The growth of portable and wireless products is driving the miniaturization of packages resulting in the development of many types of thin form factor packages and cost effective assembly processes. Wire bonded packages using conventional copper lead frame have been used in industry for quite some time. However, the demand for consumer electronics is driving the need for flip chip interconnects as these packages shorten the signals, reduce inductance and improve functionality as compared to the wire bonded packages. The flip chip packages have solder bumps as interconnects instead of wire bonds and typically use an interposer or organic substrate instead of a metal lead frame (...)
The paper provides a general overview of typical defects and failure modes seen in package assembly and reviews the efforts needed to understand new failure modes during package assembly. The root cause evaluations and lessons learned as the factory transitioned to thin form factor packages are shared...
