Package on Package (PoP) Stacking and Board Level Reliability, Results of Joint Industry Study
Published: |
August 2, 2007 |
Author: |
Moody Dreiza, Lee Smith - Amkor Technology, Gene Dunn - Panasonic Factory Solutions, Niranjan Vijayaragavan, Jeremy Werner - Spansion. |
Abstract: |
This paper presents the results of a joint - three way study between Amkor Technology, Panasonic Factory Solutions and Spansion in the area of package on package (PoP) board level reliability (BLR) (...) The scope of this paper is to cover the already popular 14 x 14mm PoP package size that provides a 152 pin stacked interface which supports a high level of flexibility in the memory architecture for multimedia requirements.... |
You must be a registered user to talk back to us. |
Company Information:
More SMT / PCB assembly technical articles »
- Apr 11, 2022 - iNEMI Webinar 07.07.2021 - PCB Cleaning | ZESTRON Americas
- Jan 28, 2022 - Open Radio Unit White Box 5G | Whizz Systems
- Nov 10, 2021 - Understanding the Cleaning Process for Automatic Stencil Printers | ITW EAE
- Oct 20, 2021 - PCB Surface Finishes & The Cleaning Process - A Compatibility Study | ZESTRON Americas
- Oct 06, 2021 - Cleaning Before Conformal Coating | ZESTRON Americas
- Browse Technical Library »
Package on Package (PoP) Stacking and Board Level Reliability, Results of Joint Industry Study article has been viewed 555 times